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directly use object files when linking ELF #22025
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Scratch that, ignore me. PR template says otherwise. |
diff --git a/builddefs/common_rules.mk b/builddefs/common_rules.mk
index 16d6af5438..52dccbe475 100644
--- a/builddefs/common_rules.mk
+++ b/builddefs/common_rules.mk
@@ -12,6 +12,9 @@ vpath %.hpp $(VPATH_SRC)
vpath %.S $(VPATH_SRC)
VPATH :=
+# Helper to return the distinct elements of a list
+uniq = $(if $1,$(firstword $1) $(call uniq,$(filter-out $(firstword $1),$1)))
+
# Convert all SRC to OBJ
define OBJ_FROM_SRC
$(patsubst %.c,$1/%.o,$(patsubst %.cpp,$1/%.o,$(patsubst %.cc,$1/%.o,$(patsubst %.S,$1/%.o,$(patsubst %.clib,$1/%.a,$($1_SRC))))))
@@ -264,7 +267,7 @@ BEGIN = gccversion sizebefore
# Note the obj.txt depeendency is there to force linking if a source file is deleted
%.elf: $(OBJ) $(MASTER_OUTPUT)/cflags.txt $(MASTER_OUTPUT)/ldflags.txt $(MASTER_OUTPUT)/obj.txt | $(BEGIN)
@$(SILENT) || printf "$(MSG_LINKING) $@" | $(AWK_CMD)
- $(eval CMD=MAKE=$(MAKE) $(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS))
+ $(eval CMD=MAKE=$(MAKE) $(CC) $(ALL_CFLAGS) $(call uniq,$(OBJ)) --output $@ $(LDFLAGS))
@$(BUILD_CMD) |
Instead of taking all prerequisites and filtering out everything that is not an object just use the objects directly. It is both easier to understand and also more robust in case other non-object files are added to the prerequisites in the future.
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LGTM, thanks.
Instead of taking all prerequisites and filtering out everything that is not an object just use the objects directly.
It is both easier to understand and also more robust in case other non-object files are added to the prerequisites in the future.